Semiconductor device having schottky junction electrode

ABSTRACT

A GaN semiconductor device with improved heat resistance of the Schottky junction electrode and excellent power performance and reliability is provided. In this semiconductor device having a Schottky gate electrode  17  which is in contact with an AlGaN electron supplying layer  14 , a gate electrode  17  comprises a laminated structure wherein a first metal layer  171  formed of any of Ni, Pt and Pd, a second metal layer  172  formed of any of Mo, Pt, W, Ti, Ta, MoSi, PtSi, WSi, TiSi, TaSi, MoN, WN, TiN and TaN, and a third metal layer formed of any of Au, Cu, Al and Pt. Since the second metal layer comprises a metal material having a high melting point, it works as a barrier to the interdiffusion between the first metal layer and the third metal layer, and the deterioration of the gate characteristics caused by high temperature operation is suppressed. Since the first metal layer contacting the AlGaN electron supplying layer  14  has a high work function, the Schottky barrier is high, and superior Schottky contact is obtained.

TECHNICAL FIELD

The present invention relates to a high output semiconductor device usedin a microwave band comprising GaN as the principal material.Particularly, the present invention relates to a Schottky junctionelectrode used for a semiconductor device superior in heat resistanceand power performance.

In order to more sufficiently describe the current level of technologypertaining to the present invention, all descriptions of the patents,the patent applications, the patent publications, the treatises onscience or the like that are cited or specified in the present patentapplication are incorporated hereinto through reference.

Background of the Art

FIG. 1 is a local longitudinal sectional view of a semiconductor devicehaving a conventional Schottky junction electrode. The semiconductordevice is reported, for example, in the Reference, IEEE Trans. MicrowaveTheory Tech. (Vol. No. 46, No. 6, Page 756, 1998) authored by U. K.Mishra et al.

As shown in FIG. 1, the semiconductor device is a heterojunctionfield-effect transistor which has a multilayered structure of aplurality of nitride compound semiconductor layers formed on a sapphiresubstrate. Specifically, a buffer layer 62 comprising aluminum nitride(AlN), a gallium nitride (GaN) channel layer 63, and an aluminum galliumnitride (AlGaN) doped layer 64 are sequentially formed on the sapphiresubstrate 61, and the laminated body of the nitride compoundsemiconductors is thus configured on the sapphire substrate 61.

In addition, a source electrode 6S and a drain electrode 6D are formedin contact with the AlGaN electron supplying layer 64, and these sourceelectrode 6S and the drain electrode 6D are in ohmic contact with theAlGaN electron supplying layer 64. Furthermore, the source electrode 6Sand the drain electrode 6D are spaced out, a gate electrode 67 is formedin contact with the AlGaN electron supplying layer 64, and this gateelectrode 67 is in Schottky contact with the AlGaN electron supplyinglayer 64. In other words, the gate electrode 67 is a Schottky gateelectrode. The gate electrode 67, herein, comprises a two-layerlaminated structure: a Ni layer 671 in contact with the AlGaN electronsupplying layer 64, and an Au layer in contact with the Ni layer 671. Inthe Schottky interface of GaN semiconductors which comprise GaN, AlGaNor the like, since the influence of Fermi level by pinning is small, thebarrier height (f B) is determined by the difference between the workfunction (Wm) of a metal and the electron affinity (?s) of asemiconductor.f B=Wm−?s  (1)Therefore, the Schottky junction electrode 67 of a semiconductor deviceby a prior art was in contact with the AlGaN layer 64, and comprised ametal layer 671 comprising metals of high work function, for example,Ni, Pt, Pd or the like. In addition, the Au layer 672 is formed on themetal layer 671 to reduce the resistance of the electrode. If theSchottky junction electrode 67 comprises Ni, Pt and Pd, even though ahigh Schottky barrier can be obtained, a problem exists in that thebarrier is thermally unstable, such as the transposition point of Nibeing low, approximately 353° C., for example. With a semiconductordevice using GaN as the principal material, operation at a high powerdensity (1 to 10 W/mm) is possible because high current density (up to 1A/mm) and high dielectric strength (up to 100V) can be obtained. Undersuch operating conditions, since the temperature in the vicinity of thegate electrode rises to over 400° C. accompanied by self-heating, thethermal diffusions of Ni, Pt and Pd which are in Schottky contact withthe GaN semiconductor and the alloying reaction between Au whichconstitutes the metal layer 672 and Ni, Pt and Pd were significant.

In order to confirm these phenomena, heat treatment was performed for 15minutes on the conventional semiconductor device shown in FIG. 1. FIG. 2is a diagram showing the reverse directional gate current-voltagecharacteristics measured before and after heat treatment was performedon the semiconductor device shown in FIG. 1. In FIG. 2, the verticalaxis indicates the gate current (A/mm) and the horizontal axis indicatesthe gate-drain voltage (V). According to FIG. 2, it was confirmed thatthe reserve directional gate current to the gate-drain voltage wasincreased by about a single digit by performing heat treatment on theconventional semiconductor device shown in FIG. 1.

Moreover, the distribution of the constituent elements in depthdirection before and after heat treatment of the conventionalsemiconductor device shown in FIG. 1 was examined by using Augerspectroscopy. FIG. 3 is a diagram showing the Auger profile before heattreatment of the conventional semiconductor device shown in FIG. 1. FIG.4 is a diagram showing the Auger profile after heat treatment of theconventional semiconductor device shown in FIG. 1. In FIG. 3 and FIG. 4,the vertical axis indicates the Auger strength (a. u.) and thehorizontal axis indicates the sputtering time (minute). By comparingFIG. 3 with FIG. 4, it was confirmed that the interdiffusion of Ni andAu was generated by performing heat treatment at 500° C. on theconventional semiconductor device shown FIG. 1. Therefore, the increaseof reverse directional gate current by the heat treatment, as shown inFIG. 2, is considered to be due to the deterioration of the Schottkybarrier at the interface with the AlGaN electron supplying layer 64because the interdiffusion of Ni and Au occurred, as shown in FIG. 3 andFIG. 4, thereby promoting the alloying of Ni and Au, and the workfunction of the NiAu alloy was smaller than that of Ni. Additionally,there was a problem in that, at high temperatures, thermal diffusion ofNi comprising the Schottky junction electrode 671 to the AlGaN electronsupplying layer 64 occurs, forming a deep level, and thereby,destabilizing element characteristics.

DISCLOSURE OF THE INVENTION

The present invention has been created in light of the afore-mentionedproblems of the prior art. Therefore, the purpose of the presentinvention is to improve the heat resistance of the Schottky junctionelectrode and to provide a semiconductor device using GaN, which hasexcellent power performance and reliability, as principal material. Thefirst aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising a compound semiconductor,which uses Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main constituent of theGroup III-element and N as the main constituent of the Group V-elements,and a Schottky junction metal layer which is in contact with thesemiconductor layer. In this semiconductor device, the Schottky junctionmetal layer comprises a laminated structure containing a first metallayer contacting the semiconductor layer, a second metal layercontacting the first metal layer and a third metal layer contacting thesecond metal layer. The second metal layer comprises a metal material ofhigher melting point than those of the first metal layer and the thirdmetal layer, and the third metal layer comprises a metal material oflower resistivity than those of the first metal layer and the secondmetal layer. The first metal layer may comprise any metal materialselected from a group comprising Ni, Pt, Pd, Ni_(z)Si_(1−z),Pt_(z)Si_(1−z), Pd_(z)Si_(1−z), Ni_(z)N_(1−z), and Pd_(z)N_(1−z),(where, 0<z<1), and the second metal layer may comprise any metalmaterial selected from a group comprising Mo, Pt, W, Ti, Ta,Mo_(x)Si_(1−x), Pt_(x)Si_(1−x), W_(x)Si_(1−x), Ti_(x)Si_(1−x),Ta_(x)Si_(1−x), Mo_(x)N_(1−x), W_(x)N_(1−x), Ti_(x)N_(1−x), andTa_(x)N_(1−x) (where, 0<x<1). Furthermore, the third metal layer maycomprise any metal material selected from a group comprising Au, Cu, Aland Pt.

Preferably, the first metal layer may comprise any metal materialselected from a group comprising Ni_(z1)Si_(1−z1) (where, 0.4≦z1≦0.75),Pt_(z2)Si_(1−z2) (where, 0.5≦z2≦0.75), Pd_(z3)Si_(1−z3) (where,0.5≦z3≦0.85), Ni_(z4)N_(1−z4) (where, 0.5≦z4≦0.85), and Pd_(z5)N_(1−z5)(where, 0.5≦z5≦0.85). The second metal layer may comprise any metalmaterial selected from a group comprising Mo, Pt, W, Ti, Ta,Mo_(x)Si_(1−x), Pt_(x)Si_(1−x), W_(x)Si_(1−x), Ti_(x)Si_(1−x),Ta_(x)Si_(1−x), Mo_(x)N_(1−x), W_(x)N_(1−x), Ti_(x)N_(1−x), andTa_(x)N_(1−x) (where, 0<x<1). Furthermore, the third metal layer maycomprise any metal material selected from a group comprising Au, Cu, Aland Pt.

The first metal layer can comprise a metal material of larger workfunction than that of the second metal layer. Also, the first metallayer can comprise a metal material of larger work function than that ofthe third metal material, in addition to that of the second metal layer.

The melting point of the second metal layer is preferably 1,000° C. orhigher and more preferably 1,500° C. or higher.

The semiconductor layer may be formed on a multi-layered structurecomprising a plurality of compound semiconductor layers formed on asubstrate.

The substrate can comprise any substrate selected from a groupcomprising a sapphire substrate, a SiC substrate and a GaN substrate.

The semiconductor layer can comprise Al_(u)Ga_(1−u)N layer (where,0≦u≦1).

The semiconductor layer can comprise a GaN compound semiconductorelectron supplying layer formed on a GaN compound semiconductor channellayer.

The GaN compound semiconductor channel layer can comprise a compoundsemiconductor selected from a group comprising GaN and InGaN, and theGaN compound semiconductor electron supplying layer can comprise AlGaN.

The semiconductor layer can comprise a GaN compound semiconductorchannel layer formed on a GaN compound semiconductor electron supplyinglayer.

The GaN compound semiconductor channel layer can comprise a compoundsemiconductor selected from a group comprising GaN and InGaN, and theGaN compound semiconductor electron supplying layer can comprise AlGaN.

The semiconductor layer can comprise an n-type GaN channel layer.

The second aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising a compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-elements, and aSchottky junction metal layer which is in contact with the semiconductorlayer. In this semiconductor device, the Schottky junction metal layercomprises a laminated structure containing a first metal layercontacting the semiconductor layer and a second metal layer contactingthe first metal layer. The first metal layer comprises a metal materialof a higher melting point than that of the second metal layer, and thesecond metal layer comprises a metal material of lower resistivity thanthat of the first metal layer.

The first metal layer can comprise any metal material selected from agroup comprising Ni_(y)Si_(1−y), Pt_(y)Si_(1−y), Pd_(y)Si_(1−y),Ni_(y)N_(1−y), and Pd_(y)N_(1−y) (where, 0<y<1). Furthermore, the secondmetal layer can comprise any metal material selected from a groupcomprising Au, Cu, Al, and Pt.

More preferably, the first metal layer may comprise any metal materialselected from a group comprising Ni_(y1)Si_(1−y1) (where, 0.4≦y1≦0.75),Pt_(y2)Si_(1−y2) (where, 0.5≦y2≦70.5), Pd_(y3)Si_(1−y3) (where,0.5≦y3≦0.85), Ni_(y4)N_(1−y4) (where, 0.5≦y4≦0.85), and Pd_(y5)N_(1−y5)(where, 0.5≦y5≦0.85). Furthermore, the second metal layer may compriseany metal material selected from a group comprising Au, Cu, Al and Pt.

The first metal layer can comprise a metal material of larger workfunction than that of the second metal layer.

The melting point of the first metal layer is preferably 1,000° C. orhigher and more preferably 1,500° C. or higher.

The semiconductor layer can be formed on a multi-layered structurecomprising a plurality of compound semiconductor layers formed on asubstrate.

The substrate can comprise any substrate selected from a groupcomprising a sapphire substrate, a SiC substrate and a GaN substrate.

The semiconductor layer can comprise Al_(u)Ga_(1−u) layer (where,0≦u≦1).

The semiconductor layer can comprise a GaN compound semiconductorelectron supplying layer formed on a GaN compound semiconductor channellayer.

The GaN compound semiconductor channel layer can comprise a compoundsemiconductor selected from a group comprising GaN and InGaN, and theGaN compound semiconductor electron supplying layer can comprise AlGaN.

The semiconductor layer can comprise a GaN compound semiconductorchannel layer formed on a GaN compound semiconductor electron supplyinglayer.

The GaN compound semiconductor channel layer can comprise a compoundsemiconductor selected from a group comprising GaN and InGaN, and theGaN compound semiconductor electron supplying layer can comprise AlGaN.

The semiconductor layer can comprise an n-type GaN channel layer.

The third aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising a compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-elements, and aSchottky junction electrode which is in contact with the semiconductorlayer. In this semiconductor device, the Schottky junction electrodecomprises a laminated structure containing a first metal layercontacting the semiconductor layer and a second metal layer contactingthe first metal layer and the third metal layer contacting the secondmetal layer. The first metal layer comprises any metal material selectedfrom a group comprising Ni, Pt, Pd, Ni_(z)Si_(1−z), Pt_(z)Si_(1−z),Pd_(z)Si_(1−z), Ni_(z)N_(1−z), and Pd_(z)N_(1−z) (where, 0<z<1), and thesecond metal layer comprises any metal material selected from a groupcomprising Mo, Pt, W, Ti, Ta, Mo_(x)Si_(1−x), Pt_(x)Si_(1−x),W_(x)Si_(1−x), Ti_(x)Si_(1−x), Ta_(x)Si_(1−x), Mo_(x)N_(1−X),W_(X)N_(1−x), Ti_(x)N_(1−x), and Ta_(x)N_(1−x) (where, 0<x<1), and thethird metal layer comprises any metal material selected from a groupcomprising Au, Cu, Al and Pt.

The fourth aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising a compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-elements, and aSchottky junction electrode which is in contact with the semiconductorlayer. In this semiconductor device, the Schottky junction electrodecomprises a laminated structure containing a first metal layercontacting the semiconductor layer and a second metal layer contactingthe first metal layer. The first metal layer comprises any metalmaterial selected from a group comprising Ni_(y)Si_(1−y),Pt_(y)Si_(1−y), Pd_(y)Si_(1−y), Ni_(y)N_(1−y), and Pd_(y)N_(1−y) (where,0<y<1), and the second metal layer comprises any metal material selectedfrom a group comprising Au, Cu, Al and Pt.

The fifth aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising the compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-elements, and aSchottky junction electrode which is in contact with the semiconductorlayer. In this semiconductor device, the Schottky junction electrodecomprises a laminated structure containing a first metal layercontacting the semiconductor layer, a second metal layer contacting thefirst metal layer, and a third metal layer contacting the second metallayer. The first metal layer comprises any metal material selected froma group comprising Ni_(z1)Si_(1−z1) (where, 0.4≦z1≦0.75),Pt_(z2)Si_(1−z2) (where, 0.5≦z2≦0.75), Pd_(z3)Si_(1−z3) (where,0.5≦z3≦0.85), Ni_(z4)N_(1−z4) (where 0 5≦z4≦0.85), and Pd_(z5)N_(1−z5)(where, 0.5≦z5≦0.85), the second metal layer comprises any metalmaterial selected from a group comprising Mo, Pt, W, Ti, Ta,Mo_(x)Si_(1−x), Pt_(x)Si_(1−x), W_(x)Si_(1−x), Ti_(x)Si_(1−x),Ta_(x)Si_(1−x), Mo_(x)N_(1−x), W_(x)N_(1−x), Ti_(x)N_(1−x), andTa_(x)N_(1−x), and the third metal layer comprises any metal materialselected from a group comprising Au, Cu, Al and Pt.

The sixth aspect of the present invention is a semiconductor devicecontaining a semiconductor layer comprising a compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-elements, and aSchottky junction electrode which is in contact with the semiconductorlayer. In this semiconductor device, the Schottky junction electrodecomprises a laminated structure containing a first metal layercontacting the semiconductor layer and a second metal layer contactingthe first metal layer. The first metal layer comprises any metalmaterial selected from a group comprising Ni_(y1)Si_(1−y1) (where,0.4≦y1≦0.75), Pt_(y2)Si_(1−y2) (where, 0.5≦y2≦70.5), Pd_(y3)Si_(1−y3)(where, 0.5≦y3≦0.85), Ni_(y4)N_(1−y4) (where, 0.5≦y4≦0.85), andPd_(y5)N_(1−y5) (where, 0.5≦y5≦0.85), and the second metal layercomprises any metal material selected from a group comprising Au, Cu, Aland Pt.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a local longitudinal sectional view of a semiconductor whichhas a conventional Schottky junction electrode;

FIG. 2 is a diagram showing the reverse directional gate current-voltagecharacteristics measured before and after heat treatment is performed onthe semiconductor device shown in FIG. 1;

FIG. 3 is a diagram showing the Auger profile before heat treatment isperformed on the conventional semiconductor device shown in FIG. 1;

FIG. 4 is a diagram showing the Auger profile after heat treatment isperformed on the conventional semiconductor device shown in FIG. 1;

FIG. 5 is a local longitudinal sectional view showing the main structureof an AlGaN/GaN heterojunction field-effect transistor in a firstembodiment according to the present invention;

FIG. 6 is a diagram showing the main structure of the reversedirectional gate-voltage characteristics before and after heat treatmentis performed on the semiconductor device in the first embodimentaccording to the present invention;

FIG. 7 is a characteristic diagram showing the gate width dependency ofthe saturated output density of both the conventional semiconductor andthe semiconductor in the first embodiment according to the presentinvention;

FIG. 8 is a local longitudinal sectional view showing the main structureof the AlGaN/GaN heterojunction field-effect transistor in a secondembodiment according to the present invention;

FIG. 9 is a local longitudinal sectional view showing the main structureof the AlGaN/GaN heterojunction field-effect transistor in a thirdembodiment according to the present invention;

FIG. 10 is a local longitudinal sectional view showing the mainstructure of the GaN metal-semiconductor field-effect transistor in afourth embodiment according to the present invention;

FIG. 11 is a local sectional longitudinal view showing the mainstructure of the GaN metal-semiconductor field-effect transistor in afifth embodiment according to the present invention;

FIG. 12 is a local longitudinal sectional view showing the mainstructure of the GaN metal-semiconductor field-effect transistor in asixth embodiment according to the present invention;

FIG. 13 is a local longitudinal sectional view showing the mainstructure of the AlGaN/GaN heterojunction field-effect transistor in aseventh embodiment according to the present invention;

FIG. 14 is a local longitudinal sectional view showing the mainstructure of the AlGaN/GaN heterojunction field-effect transistor in aneighth embodiment according to the present invention; and

FIG. 15 is a local longitudinal sectional view showing the mainstructure of the AlGaN/GaN heterojunction field-effect transistor in aninth embodiment according to the present invention.

BEST MODES FOR CARRYING OUT THE INVENTION

Described below are the embodiments of the present invention accordingto the forms of embodiments in reference to the drawings.

First Embodiment

Described is a first embodiment according to the present invention inreference to FIG. 5, FIG. 6, and FIG. 7.

FIG. 5 is a local longitudinal sectional view showing the main structureof an AlGaN/GaN heterojunction field-effect transistor (HJFET) in thefirst embodiment according to the present invention. The transistor isformed on a sapphire substrate 11. In FIG. 5, an undoped AlN bufferlayer 12 is formed on the sapphire substrate 11. An undoped GaN channellayer 13 is formed on the undoped AlN buffer layer 12. An undoped AlGaNelectron supplying layer 14 is formed on the undoped GaN channel layer13. Furthermore, a source electrode 6S and a drain electrode 6D areformed in contact with the upper surface of the AlGaN electron supplyinglayer 14. The source electrode 6 s and the drain electrode 6D are inohmic contact with the AlGaN electron supplying layer 14.

Furthermore, a gate electrode 17 is formed in contact with the uppersurface of the AlGaN electron supplying layer 14. The gate electrode 17is spaced between the source electrode 6S and the drain electrode 6D.The gate electrode 17 is in Schottky contact with the AlGaN electronsupplying layer 14. The gate electrode 17 has a three-layer structure.More specifically, the three-layer structure comprises a Ni layer 171contacting the upper surface of the AlGaN electron supplying layer 14, aMo layer 172 contacting the upper surface of the Ni layer 171, and an Aulayer 173 contacting the upper surface of the Mo layer. The Ni layer isin Schottky contact with the AlGaN electron supplying layer 14.

In addition, accompanying the piezo polarization effect and spontaneouspolarization effect attributable to the difference in grating constantbetween GaN and AlGaN, a two-dimensional electron gas is formed in thearea within the GaN channel layer 13 in the vicinity of the interfacewith the AlGaN electron supplying layer 14. The heterojunctionfield-effect transistor (HJFET) operates as a transistor by modulatingthe two-dimensional electron gas concentration with the potential of thegate electrode 17. The semiconductor according to this embodiment can beprepared in the following manner. The afore-mentioned undoped AlN bufferlayer 12 with a film thickness of 20 nm, the undoped GaN channel layer13 with a film thickness of 2 μm, and the undoped Al_(0.3)Ga_(0.7)Nelectron supplying layer 14 with a film thickness of 30 nm aresequentially grown on the sapphire substrate 11 which has a (0001)surface by, for example, the molecular beam epitaxy (MBE) process.

Here, although the grating constants of AlGaN and GaN differ, the filmthickness of 30 nm of the undoped Al_(0.3)Ga_(0.7)N electron supplyinglayer 14 is less than the critical film thickness at the time oftransposition.

Next, the source electrode 6S and the drain electrode 6D are each formedon the AlGaN electron supplying layer 14, for example, by performingvapor deposition or alloy processing on metals such as Ti/Al, and thesesource electrode 6S and drain electrode 6D are in ohmical contact withthe AlGaN electron supplying layer 14. Finally, metal layers aresequentially formed on the AlGaN electron supplying layer 14 in thesequence and with the thicknesses stated below, for example, by vapordeposition/lift-off process to form the Schottky gate electrode 17. Afirst metal layer 171 comprising Ni of a thickness of 15 nm is formed onthe AlGaN electron supplying layer 14; a second metal layer 172comprising Mo of a thickness of 15 nm is formed on the first metal layer171; a the third metal layer 173 comprising Au of thickness of 200 nm isformed on the second metal layer. The semiconductor device shown in FIG.5 can thus be prepared.

The important point in this embodiment lies in the fact that theSchottky gate electrode 17 comprises a three-layer structure wherein thefirst metal layer 171 comprises Ni which is a metal having a high workfunction, the second metal layer 172 comprises Mo which is a metalhaving a high melting point, and the third metal layer 173 comprises Auwhich is a metal having a low resistivity. More specifically, in orderto form a high Schottky barrier at the interface between thesemiconductor and the Schottky gate electrode 17, the first metal layer171 comprises a metal having a high work function. On the other hand, inorder to reduce the resistance of the Schottky gate electrode 17, thethird metal layer 173 comprises a metal having a low resistivity.Furthermore, in order to prevent interdiffusion at high temperaturesbetween the first metal layer 171 and the third mental layer 173, thesecond metal layer 172 comprising a metal having a high melting point isinterposed between the first metal layer 171 and the third metal layer173, thereby making possible the enhancement of high temperaturecharacteristics and high power performance of the semiconductor devicethrough enabling the Schottky gate electrode 17 to have a high Schottkybarrier, low resistivity and high heat resistance.

More specifically, even when comparing Mo which is the metal material ofthe second metal layer 172 with Ni which is the metal material of thefirst metal layer 171 and Au which is the metal material of the thirdmetal layer 173, since Mo has the high melting point of approximately2,630° C., it functions as a barrier layer to the interdiffusion of Niand Au. In other words, since the second metal layer 172 which isinterposed between the first metal layer 171 and the third metal layer173 has a higher melting point than those of the first metal layer 171and the third metal layer 173, even if the temperature of the Schottkygate electrode 17 rises to a high degree, the interdiffusion between themetal in the first metal layer 171 and that in the third metal layer 173is suppressed, thereby suppressing the alloying between the metals.Although the first metal layer 171 comprises metal of a high workfunction, the deterioration of the Schottky barrier at the interfacebetween the AlGaN electron supplying layer 14 and the first metal layer171 and the increase of reverse directional gate current can besuppressed even at high temperatures by suppressing the alloying, asstated above. Therefore, the gate leak current is suppressed even athigh temperatures, the heat resistance of the Schottky gate electrode 17is improved, and as a result, the reliability of the device is improved.In addition, the first metal layer 171 contacting the AlGaN electronsupplying layer 14 comprises Ni, and since the work function of Ni islarge, approximately 4.6 eV, the Schottky barrier is high, and anexcellent Schottky contact can be obtained. Furthermore, the third metallayer 173 comprises Au, and the resistivity of Au is low. Therefore, thehigh temperature characteristics and high power performance of thesemiconductor device can be improved by enabling the Schottky gateelectrode 17 to have not only a high Schottky barrier and lowresistance, but also high heat resistance. In order to verify theforegoing, heat treatment was performed on the semiconductor device inthis embodiment at a temperature of 500° C. for 15 minutes. Furthermore,the reverse directional gate current-voltage characteristics before andafter heat treatment was performed on the semiconductor device wasmeasured. FIG. 6 is a diagram showing the reverse directional gatecurrent-voltage characteristics before and after heat treatment of thesemiconductor device in the first embodiment according to the presentinvention. In FIG. 6, the vertical axis indicates the gate current(A/mm) and the horizontal axis indicates the gate drain voltage (V). Thebroken line shows the reverse directional gate current-voltagecharacteristics before heat treatment, and the continuous line shows thereverse directional gate current-voltage characteristics after heattreatment. Almost no change could be observed in the reverse directionalgate current before the treatment and after the treatment; that is, theeffect of the improved heat resistance in the Schottky gate electrode 17was confirmed by inserting the Mo layer, which has a high meting point,between the Ni layer and the Au layer.

FIG. 7 is a characteristic diagram showing the gate width dependency ofthe saturated output density of both the conventional semiconductordevice and the semiconductor device in the first embodiment according tothe present invention. In FIG. 7, the vertical axis indicates thesaturated power (W/mm) and the horizontal axis indicates the gate widthof the semiconductor device (mm). The broken line shows the gate widthdependency of the saturated output density of the semiconductor devicein the prior art, and the continuous line shows that of thesemiconductor device in those embodiment. In the prior art, in a largedevice with a gate width of 32 mm or longer, it was observed that thesaturated output density caused by self-heating dropped significantly.On the other hand, in this embodiment, it was confirmed that thedecrease in output density accompanied by an increase in gate width wassmall, and power performance was enhanced by the improved heatresistance in the Schottky gate electrode. In the embodiment accordingto the present invention, even though Mo was given as one typicalexample of a metal element having a high melting point which comprisesthe second metal layer 172, the foregoing effect can be obtained even ifMo is replaced with, for example, another metal element having a highmelting point. Other typical examples of metal elements having a highmelting point which comprise the second metal layer 172 include Pt, W,Ti and Ta, but are not necessarily limited to these elements. Morespecifically, the second metal layer 172 comprising Mo can be replacedwith any of a Pt layer, a W layer, a Ti layer and a Ta layer.

The same effect as that in the foregoing can be obtained even if theafore-mentioned metal elements having a high melting point are replacedwith intermetallic compounds such as metal silicates and metal nitrideswhich are thermally stable and have a high melting point as the metalmaterials which comprise the second metal layer. For example, as themetal materials which comprise the second metal layer 172, the metallayer can be replaced with any of Mo_(x)Si_(1−x) layer (where, 0<x<1),Pt_(x)Si_(1−x) layer (where, 0<x<1), W_(x)Si_(1−x) layer (where, 0<x<1),Ti_(x)Si_(1−x) layer (where, 0<x<1), Ta_(x)Si_(1−x) layer (where,0<x<1), Mo_(x)N_(1−x) layer (where, 0<x<1), W_(x)N_(1−x) (where, 0<x<1),Ti_(x)N_(1−x) layer (where, 0<x<1), and Ta_(x)N_(1−x) layer (where,0<x<1). If the melting point of the metal element or the intermetalliccompound such as metal silicate and metal nitride comprising the secondmetal layer 172 is 1,000° C. or higher, the afore-mentioned effect canbe obtained. Moreover, it is more preferable that the melting point is1,500° C. or higher.

Furthermore, in this embodiment according to the present invention,although Ni is given as one typical example of a metal element having ahigh work function which comprises the first metal layer 171, theforegoing effect can be obtained even if Ni is replaced with, forexample, another metal element having a high working function. Othertypical examples of metal elements having a high work function whichcomprise the metal layer 171 include Pt and Pd, but are not necessarilylimited to these elements. More specifically, the first metal layer 171comprising Ni can be replaced with any of a Pt layer and a Pd layer.

Additionally, in this embodiment according to the present invention,although Au is given as one typical example of a metal element having alow resistivity which comprises the third metal layer 173, the foregoingeffect can be obtained even if Au is replaced with, for example, anothermetal element having a low resistivity. Other typical examples of metalelements having a low resistivity which comprise the third metal layer173 include Cu, Al and Pt, but are not necessarily limited to theseelements. More specifically, the third metal layer 173 comprising Au canbe replaced with any of a Cu layer, an Al layer and a Pt layer.Moreover, since the third metal layer 173 is a layer provided to reducethe resistance of the Schottky gate electrode as stated above,limitations to the material and the like are unnecessary as long as thelayer complies with the purpose.

Furthermore, in the embodiment according to the present invention,although the semiconductor layer with which the Schottky junctionelectrode is in contact comprises the AlGaN layer, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with the GaN layer, the InAlN layer, the InGaN layer,the InAlGaN layer and the AlN layer. In addition, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with a superlattice layer comprising at least one layerout of the GaN layer, the AlGaN layer, the InAlN layer, the InGaN layer,the InAlGaN layer and the AlN layer. More specifically, the same effectas that in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with the semiconductor layer comprising a compoundsemiconductor using Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main componentof the Group III-elements and N as the main component of the GroupV-element.

Furthermore, although the embodiments according to the present inventionare described by giving a semiconductor device having a planar structurewherein the source electrode, the gate electrode and the drain electrodeare formed on the same semiconductor layer as an example, the sameeffect as that in the foregoing can be obtained even if theafore-mentioned structure is applied to the Schottky junction electrodeon a semiconductor device having other Group III-nitride structures. Astypical examples of structures other than the planar structure, it maybe a recess structure wherein a cap layer selectively comprising anN-type semiconductor is formed under the source electrode and the drainelectrode, or an embedded gate structure wherein the gate electrode isembedded in the semiconductor layer such as GaN and AlGaN.

Second Embodiment

Next, a second embodiment according to the present invention isdescribed in reference to FIG. 8.

FIG. 8 is a local vertical view showing the main structure of anAlGaN/GaN heterojunction field-effect transistor (HJFET) in the secondembodiment according to the present invention. The transistor is formedon a sapphire substrate 21. In FIG. 8, an undoped AlN buffer layer 22with a film thickness of 20 nm is formed on the sapphire substrate 21,an undoped GaN channel layer 23 with a film thickness of 2 μm is formedon the AlN buffer layer 22, and an AlGaN electron supplying layer 24comprising undoped Al_(0.3)Ga_(0.7)N with a film thickness of 30 nm isformed on the GaN channel layer 23.

A source electrode 6S and a drain electrode 6D are formed in contactwith the upper surface of the AlGaN electron supplying layer 24. Thesource electrode 6S and the drain electrode 6D are in ohmic contact withthe AlGaN electron supplying layer 24. Furthermore, a gate electrode 27is formed in contact with the upper surface of the AlGaN electronsupplying layer 24. The gate electrode 27 is spaced between the sourceelectrode 6S and the drain electrode 6D. The gate electrode is inSchottky contact with the AlGaN electron supplying layer 24. The gateelectrode 27 has a two-layer laminated structure. More specifically, thetwo-layer laminated structure comprises a first metal layer which is incontact with the upper surface of the AlGaN doped layer and comprises aNi_(0.7)Si_(0.3) layer 271 with a film thickness of 15 nm, and a secondmetal layer which is in contact with the upper surface of the firstmetal layer and comprises an Au layer 272 with film thickness of 200 nm.The Ni_(0.7)Si_(0.3) layer is in Shottky contact with the AlGaN electronsupplying layer 24.

Furthermore, accompanying the piezo polarization effect and thespontaneous polarization effect attributable to the difference ingrating constant between GaN and AlGaN, a two-dimensional electron gasis formed in the area within the GaN channel layer 23 in the vicinity ofthe interface with AlGaN electron supplying layer 24. The heterojunctionfield-effect transistor (HJFET) operates as a transistor by modulatingthe two-dimensional electron gas concentration with the potential of thegate electrode 27. The important point in the embodiment lies in thefact that the Schottky gate electrode 27 comprises a two-layer laminatedstructure wherein the first metal layer 271 comprises Ni_(y)Si_(1−y)(where, 0<y<1) and the second metal layer 272 comprises Au which has alow resistivity as the metal materials having a high work function and ahigh melting point. Since the bonding force between Ni and Si inNi_(y)Si_(1−y) (where, 0<y<1), which is one example of metal silicates,is strong, it is more stable at high temperatures than simple substanceNi. Preferably, it is 0.4≦y≦0.75. If it is 0.65≦y≦0.75 in particular,the melting point is extremely high, approximately 1,200° C. or higher,and, in addition, it is more preferable since the increase inresistivity is smaller in comparison with Ni. For this reason, thethermal diffusion of metal of the first metal layer 271 to thesemiconductor layer, with which the Schottky gate electrode 27 is incontact, is suppressed even at high temperatures. Furthermore, theinterdiffusion between the metal in the second metal layer 272 and thatin the first metal layer 271 at high temperatures is suppressed. As aresult, the reliability of the device is enhanced. More specifically, inorder to reduce the resistance of the Schottky gate electrode 27, thesecond metal layer 272 comprises a metal having low resistivity. On theother hand, in order to form a high Schottky barrier at the interfacebetween the semiconductor layer and the Schottky electrode 27, andsuppress the interdiffusion between the metal in the second metal layer272 and the first metal layer at a high temperature and the thermaldiffusion to the semiconductor layer with which the first metal layer271 is in contact, the first metal layer 271 comprises a metal having ahigh work function and a high melting point, thereby making possible theenhancement of high temperature characteristics and high powerperformance of the semiconductor device through enabling the Schottkyelectrode 27 to have not only a high Schottky barrier and lowresistivity, but also high heat resistance.

More specifically, since NiSi which is the metal material of the firstmetal layer 271 has a higher melting point than that of Au which is thematerial of the second metal layer 272, the interdiffusion between NiSiand Au is suppressed and the thermal diffusion to the semiconductorlayer with which the first metal layer 271 is in contact is suppressedas well. In other words, since the first metal layer 271 comprises ametal having a high work function and a high melting point, not only isa Schottky barrier formed at the interface between the semiconductorlayer and the Schottky gate electrode 27, but even if the Schottky gateelectrode 27 rises to a high temperature, the interdiffusion between themetal in the first metal layer 271 and that in the second metal layer272 is suppressed as well, and thereby, intermetallic alloying issuppressed. In addition, the thermal diffusion to the semiconductorlayer which the first metal layer 271 contacts is suppressed. Althoughthe first metal layer 271 comprises a metal having a high work function,by suppressing the alloying as stated above, the deterioration of theSchottky barrier at the interface between the AlGaN electron supplyinglayer 24 and the first metal layer 271 can be suppressed even at hightemperatures, and an increase in the reverse directional gate currentcan be suppressed even at high temperatures. Thus, the gate leak currentis suppressed even at high temperatures, heat resistance of the Schottkygate electrode 27 is improved, and as a result, the reliability of thedevice is enhanced. Therefore, enhancement of high temperaturecharacteristics and high power performance of the semiconductor deviceis made possible by enabling the Schottky gate electrode 27 to have notonly a high Schottky barrier and low resistance but also high heatresistance.

In this embodiment according to the present invention, although NiSi isgiven as one typical example of an intermetallic compound having a highwork function and a high melting point which comprises the first metallayer 271, the foregoing effect can be obtained even if NiSi is replacedwith, for example, another intermetallic compound having a high workfunction and a high melting point. Other typical examples ofintermetallic compounds having a high work function and a high meltingpoint comprising the first metal layer 271 include metal silicates andmetal nitride such as PtSi, PdSi, NiN and PdN, but are not necessarilylimited to these metals. More specifically, NiSi comprising the firstmetal layer 271 can be replaced with any of Pt_(y)Si_(1−y) (where,0.5≦y≦0.75), Pd_(y)Si_(1−y) (where, 0.5≦y≦0.85), Ni_(y)N_(1−y) (where,0.5≦y≦0.85) and Pd_(y)N_(1−y) (where, 0.5≦y≦0.85). If the melting pointsof the intermetallic compounds such as metal silicates and metalnitrides comprising the first metal layer 271 are 1,000° C. or higher,the foregoing effect can be obtained. Moreover, it is more preferable ifthe melting point is 1,500° C. or higher.

Furthermore, in this embodiment according to the present invention,although Au is given as one typical example of a metal element having alow resistivity which comprises the second metal layer 272, theforegoing effect can be obtained even if Au is replaced with, forexample, another metal having a low resistivity. Other typical examplesof metal elements having a low resistivity which comprise the secondmetal layer 272 include Cu, Al and Pt, but are not necessarily limitedto these elements. More specifically, the second metal layer 272comprising Au can be replaced with any of a Cu layer, an Al layer, and aPt layer. Moreover, since the second metal layer 272 is a layer providedto reduce the resistance of the Schottky gate electrode as stated above,limitations to the materials and the like are unnecessary as long as thelayer complies with the purpose.

Furthermore, in this embodiment according to the present invention,although the semiconductor layer with which the Schottky junctionelectrode is in contact comprises the AlGaN layer, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with the GaN layer, the InAlN layer, the InGaN layer,the InAlGaN layer and the AlN layer. In addition, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with a superlattice layer containing at least one layerout of the GaN layer, the AlGaN layer, the InAlN layer, the InGaN layer,the InAlGaN layer and the AlN layer. More specifically, the same effectas that in the foregoing can be obtained even if the aforementionedstructure is applied to the Schottky junction electrode which is inShottky contact with a semiconductor layer comprising a compoundsemiconductor using Ga_(v)Al_(1−v) (where, 0≦v≦1) as the main componentof the Group III-elements and N as the main component of the GroupV-element.

Furthermore, although the embodiments according to the present inventionare described by giving a semiconductor device having a planar structurewherein the source electrode, the gate electrode, and the drainelectrode are formed on the same semiconductor layer as an example, thesame effect as that in the foregoing can be obtained even if theafore-mentioned structure is applied to the Schottky junction electrodeon the semiconductor device having other Group III-nitride structures.As typical examples of structures other than the planar structure, itmay be a recess structure wherein a cap layer selectively comprising anN-type semiconductor is formed under the source electrode and the drainelectrode, or an embedded gate structure wherein the gate electrode isembedded in the semiconductor layer such as GaN and AlGaN.

Third Embodiment

Next, a third embodiment according to the present invention is describedin reference to FIG. 9.

FIG. 9 is a local vertical view showing the main structure of anAlGaN/GaN heterojunction field-effect transistor (HJFET) in the thirdembodiment according to the present invention. The transistor is formedon a SiC substrate 31. In FIG. 9, an undoped AlN buffer layer 32 isformed on the SiC substrate 31, an undoped GaN buffer layer 33 with afilm thickness of 2 μm is formed on the undoped AlN buffer layer 32, anInGaN channel layer 34 comprising an undoped In_(0.1)Ga_(0.9)N with afilm thickness of 15 nm is formed on the undoped GaN buffer layer 33,and an AlGaN electron supplying layer 35 comprising an undopedAl_(0.2)Ga_(0.8)N with a film thickness of 40 nm is formed on the InGaNchannel layer 34.

A source electrode 6S and a drain electrode 6D are formed in contactwith the upper surface of the AlGaN electron supplying layer 35. Thesource electrode 6S and the drain electrode 6D are in ohmic contact withthe AlGaN electron supplying layer 35. Furthermore, a gate electrode 37is formed in contact with the upper surface of the AlGaN electronsupplying layer 35. The gate electrode 37 is spaced between the sourceelectrode 6S and the drain electrode 6D. The gate electrode 37 is inSchottky contact with the AlGaN electron supplying layer 35. The gateelectrode 37 has a three-layer laminated structure. More specifically,the three-layer laminated structure comprises a first metal layer whichis in contact with the surface of the AlGaN electron supplying layer 35and comprises a Ni0.7Si0.3 layer 371, a second metal layer which is incontact with the upper surface of the first metal layer and comprises aMo layer 372 and a third metal layer which is in contact with the uppersurface of the second metal layer and comprises an Au layer 373. Thefirst metal layer comprising the Ni0.7Si0.3 Layer 371 is in Schottkycontact with the AlGaN electron supplying layer 35.

In addition, accompanied by the piezo polarization effect andspontaneous polarization effect attributable to the difference ingrating constant between InGaN and AlGaN, a two-dimensional electron gasis formed in the area within the InGaN channel layer 34 in the vicinityof the interface with the AlGaN layer 35. The heterojunctionfield-effect transistor (HJFET) operates as a transistor by modulatingthe two-dimensional electron gas concentration with the potential of thegate electrode 37.

The important point in this embodiment lies in the fact that theSchottky gate electrode 37, comprises a three-layered laminatedstructure wherein a first metal layer 371 comprises Ni_(y)Si_(1−y)(where, 0<y<1) as the metal material having a high work function andhigh melting point, a second metal layer 372 comprises Mo which is ametal having a higher melting point than that of the first metal layer371, and a third metal layer 373 comprises Au which is a metal having alow resistivity. More specifically, since the bonding force between Niand Si in Ni_(y)Si_(1−y) (0<y<1), which is one example of metalsilicates, is strong, it is more stable at high temperatures than singlesubstance, Ni. Preferably, it is 0.4≦y≦0.75. If it is 0.65≦y≦0.75 inparticular, the melting point extremely high, approximately 1,200° C.,and in addition, it is more preferable since the increase in resistivityis smaller in comparison with Ni. For this reason, the thermal diffusionof the metal in the first metal layer 371 to the semiconductor layer,with which the Schottky electrode 37 is in contact, is suppressed evenat high temperatures. Furthermore, the interdiffusion between the metalin the first metal layer 371 and that in the second metal layer 372 athigh temperatures is also suppressed. As a result, the reliability ofthe device is enhanced.

More specifically, in order to reduce the resistance of the Schottkygate electrode 37, the third metal layer 373 comprises a metal having alow resistivity. On the other hand, in order to form a high Schottkybarrier at the interface between the semiconductor layer and theSchottky gate electrode 37 and suppress the interdiffusion between themetal in the third metal layer 373 and that in the first metal layer 371and the thermal diffusion of the metal to the semiconductor layer, withwhich the first metal layer 371 is connected, at high temperatures, thefirst metal layer 371 comprises a metal having a high work function andhigh melting point.

In addition, in order to more definitely prevent the interdiffusionbetween the metal in the first metal layer 371 and that in the thirdmetal layer 373 at high temperatures, the second metal layer 372 whichcomprises a metal having a higher melting point than that in the firstmetal layer 371 is interposed between the first metal layer 371 and thethird metal layer 373, thereby making possible enhancement of the hightemperature characteristics and high power performance of thesemiconductor device through enabling the Schottky gate electrode 37 tohave not only a high Schottky barrier and low resistance but alsoextremely high heat resistance.

More specifically, even when comparing Mo, which is the metal materialof the second metal layer 372, with NiSi, which is the metal material ofthe first metal layer 371, and Au, which is the metal material of thethird metal layer 373, since the melting point of Mo is extremely high,approximately 2,630° C., it works as a barrier to the interdiffusion ofNi and Au. In other words, since the second metal layer 372, which isinterposed between the first metal layer 371 and the second metal layer373, has a higher melting point than those of the first metal layer 371and the third metal layer 373, even if the Schottky gate electrode 37rises to high temperatures, the interdiffusion between the metal in thefirst metal layer 371 and that in the third metal layer 373 issuppressed, thereby suppressing the alloying between these metals.Although the first metal layer 371 comprises a metal having a high workfunction, the deterioration of the Schottky barrier at the interfacebetween the AlGaN electron supplying layer 35 and the first metal layer371 and increase in the reverse directional gate current can besuppressed even at high temperatures, by suppressing the alloying asstated above. Thus, the gate leak current is suppressed even at hightemperatures, heat resistance of the Schottky gate electrode 37 isimproved, and as a result, the reliability of the device is enhanced.Therefore, enhancement of high temperature characteristics and highpower performance of the semiconductor device is made possible throughenabling the Schottky gate electrode 37 to have not only a high Schottkybarrier and low resistance, but also high heat resistance.

In this embodiment according to the present invention, although NiSi isgiven as one typical example of an intermetallic compound having a highwork function and a high melting point which comprises the first metallayer 371, the same effect as in the foregoing can be obtained even ifNiSi is replaced with, for example, another intermetallic compoundhaving a high work function and a high melting point. Other typicalexamples of the intermetallic compounds having a high work function anda high melting point comprising the first metal layer 371 include metalsilicates and metal nitrides such as PtSi, PdSi, NiN and PdN, but arenot necessarily limited to these metals. More specifically, NiSicomprising the first metal layer 371 can be replaced with any ofPt_(y)Si_(1−y) (where, 0.5≦y≦0.75), Pd_(y)Si_(1−y) (where, 0.5≦y≦0.85),Ni_(y)N_(1−y) (where, 0.5≦y≦0.85) and Pd_(y)N_(1−y) (where 0.5≦y≦0.85).If the melting points of the intermetallic compounds such as metalsilicates and metal nitrides comprising the first metal layer 371 are1,000° C. or higher, the forgoing effect can be obtained. Moreover, itis more preferable if the melting point is 1,500° C. or higher.

In this embodiment according to the present invention, although Mo isgiven as one typical example of a metal element having a high meltingpoint which comprises the second metal layer 372, the foregoing effectcan be obtained even if Mo is replaced with, for example, another metalelement having a high melting point. Other typical examples of metalelements each having a high melting point which comprise the secondmetal layer 372 include Pt, W, Ti and Ta, but are not necessarilylimited to these elements. More specifically, the second metal layer 372comprising Mo can be replaced with any of the Pt layer, the W layer, theTi layer and the Ta layer. The same effect as that in the foregoing canbe obtained even if the afore-mentioned metal element having a highmelting point is replaced with intermetallic compounds such as metalsilicates and metal nitrides which have a high melting point and arethermally stable as the metal element comprising the second metal layer372. For example, the metal materials which comprise the second metallayer 372 can be replaced with any of Mo_(x)Si_(1−x) layer (where,0<x<1), Pt_(x)Si_(1−x) layer (where, 0<x<1), W_(x)Si_(1−x) layer (where,0<x<1), Ti_(x)Si_(1−x) layer (where, 0<x<1), Ta_(x)Si_(1−x) layer(where, 0<x<1), Mo_(x)N_(1−x) layer (where, 0<x<1), W_(x)N_(1−x) (where,0<x<1), Ti_(x)N_(1−x) layer (where, 0<x<1), and Ta_(x)N_(1−x) layer(where, 0<x<1). If the melting points of the metal element or theintermetallic compound such as metal silicate and metal nitride whichcomprise the second metal layer 372 are 1,000° C. or higher, theforgoing effect can be obtained. Moreover, it is more preferable if themelting point is 1,500° C. or higher. Furthermore, in this embodimentaccording to the present invention, although Au is given as one typicalexample of a metal element having a low resistivity which comprises thethird metal layer 373, the forgoing effect can be obtained even if Au isreplaced with, for example, another metal element having a lowresistivity. Other typical examples of metal elements having a lowresistivity which comprise the third metal layer 373 include Cu, Al andPt, but are not necessarily limited to these elements. Morespecifically, the third metal layer 373 which comprises Au can bereplaced with any of the Cu layer, the Au layer and the Pt layer. Sincethe third metal layer 373 is a layer provided to reduce the resistanceof the Schottky gate electrode as stated above, limitations to thematerials and the like are unnecessary as long as the layer complieswith the purpose.

Furthermore, in this embodiment according to the present invention,although the semiconductor layer with which the Schottky junctionelectrode is in contact comprises the AlGaN layer, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with the GaN layer, the InAlN layer, the InGaN layer,the InAlGaN layer, and the AlN layer. In addition, the same effect asthat in the foregoing can be obtained even if the afore-mentionedstructure is applied to the Schottky junction electrode which is inSchottky contact with a superlattice layer containing at least one layerout of the GaN layer, the InAlN layer, the InGaN layer, the InAlGaNlayer and the AlN layer. More specifically, the same effect as that inthe foregoing can be obtained even if the afore-mentioned structure isapplied to the Schottky junction electrode which is in Schottky contactwith the semiconductor layer comprising a compound semiconductor usingGa_(v)Al_(1−v) (where, 0≦v≦1) as the main components of the GroupIII-elements and N as the main component of the Group V-element.

Furthermore, although the embodiment according to the present inventionis described by giving the semiconductor device having a planarstructure wherein the source electrode, the gate electrode, the drainelectrode are formed on the same semiconductor layer as an example, thesame effect as that in the foregoing can be obtained even if theafore-mentioned structure is applied to the Schottky junction electrodeon the semiconductor device having other Group III-nitride structures.As typical examples of structures other than the planar structure, itmay be a recess structure wherein a cap layer selectively comprisingGaN-type semiconductor is formed under the source electrode and thedrain electrode or an embedded gate structure wherein the gate electrodeis embedded in a semiconductor layer such as GaN and AlGaN.

Fourth Embodiment

Next, a fourth embodiment according to the present invention isdescribed in reference to FIG. 10.

FIG. 10 is a local longitudinal sectional view showing the mainstructure of a GaN metal-semiconductor field-effect transistor (MESFET)in the fourth embodiment according to the present invention. Thetransistor is formed on a SiC substrate 41. In FIG. 10, an undoped AlNbuffer layer 42 is formed on the SiC substrate 41, an undoped GaN bufferlayer 43 with a film thickness of 1 μm is formed on the undoped AlNbuffer layer 42, and a n-type GaN channel layer 44 with an impurityconcentration of 2×1017.cm3 and a film thickness of 150 nm is formed onthe undoped GaN buffer layer 43.

A source electrode 6S and a drain electrode 6D are formed in contactwith the upper surface of the n-type GaN channel layer 44. The sourceelectrode 6S and the drain electrode 6D are in ohmic contact with then-type GaN channel layer 44.

Furthermore, a gate electrode 47 is formed in contact with the uppersurface of the n-type GaN channel layer 44. The gate electrode 47 isspaced between the source electrode 6S and the drain electrode 6D. Thegate electrode 47 is in Schottky contact with the n-type GaN channellayer 44. The gate electrode 47 has a three-layer laminated structure.More specifically, the three-layer laminated structure comprises a Nilayer 471 which is in contact with the upper surface of the n-type GaNchannel layer 44, a Mo layer which is in contact with the upper surfaceof the Ni layer 471 and an Au layer 473 which is contact with the uppersurface of the Mo layer 472. The Ni layer 471 is in Schottky contactwith the n-type GaN channel layer 44.

A depletion layer is formed in the area within the n-type GaN channellayer 44 in the vicinity of the interface with the gate electrode 47. Ametal-semiconductor field-effect transistor (MESFET) operates as atransistor by modulating the thickness of the depletion layer with thepotential of the gate electrode 47.

In this embodiment according to the present invention, although thechannel layer comprises n-type GaN, it may be replaced with an n-typeInGaN.

In this embodiment according to the present invention, the structure ofthe gate electrode 47 is the same as that of the gate electrodestructure 17 in the first embodiment, shown in FIG. 5. In other words,in this embodiment according to the present invention, the gateelectrode structure 17 in the first embodiment shown in FIG. 5 isapplied to the GaN metal-semiconductor field-effect transistor (MESFET).Therefore, the same effect as that described in the first embodiment canbe obtained.

The important point in this embodiment lies in the fact that theSchottky gate electrode 47 comprises a three-layered laminated structurewherein a first metal layer 471 comprises Ni as the metal having a highwork function, the second metal layer 472 comprises Mo which is themetal having a high melting point and the third metal layer 473comprises Au which is the metal having a low resistivity. Morespecifically, in order to form a high Schottky barrier at the interfacebetween the semiconductor layer and the Schottky gate electrode 47, thefirst metal layer 471 comprises a metal having a high work function, andon the other hand, in order to reduce the resistance of the Schottkygate electrode 47, the third metal layer 473 comprises a metal havinglow resistivity. Furthermore, in order to prevent the interdiffusionbetween the first metal layer 471 and the third metal layer 473 at hightemperatures, the second metal layer 472 comprising a metal having ahigh melting point is interposed between the first metal layer 471 andthe third metal layer 473, thereby making possible enhancement of thehigh temperature characteristics and high power performance of thesemiconductor device through enabling the Schottky gate electrode 47 tohave not only a high Schottky barrier and low resistance, but also highheat resistance.

More specifically, when comparing Mo, which is the metal material of thesecond metal layer 472, with Ni, which is the metal material of thefirst metal layer 471, and Au, which is the metal material of the thirdmetal layer 473, since the melting point of Mo is extremely high,approximately 2,630° C., the layer works as a barrier layer to theinterdiffusion between Ni and Au. In other words, since the second metallayer 472 which is interposed between the first metal layer 471 and thethird metal layer 473 has a higher meting point those of the first metallayer 471 and the third metal layer 473, even if the Schottky gateelectrode 47 rises to a high temperature, the interdiffusion between themetal in the first metal layer 471 and that in the third metal layer 473is suppressed, thereby suppressing the alloying between these metals.Although the first metal layer 471 comprises a metal having a high workfunction, the deterioration of the Schottky barrier at the interfacebetween the n-type GaN channel layer 44 and the first metal layer 471and increase in the reverse directional gate current can be suppressedeven at high temperatures, by suppressing the alloying as stated above.Thus, the gate leak current is suppressed even at high temperatures, theheat resistance of the Schottky gate electrode 47 is improved, and as aresult, the reliability of the device is enhanced. Therefore,enhancement of the high temperature characteristics and high powerperformance of the semiconductor device is made possible throughenabling the Schottky gate electrode 47 to have not only a high Schottkybarrier and low resistance, but also high heat resistance.

In this embodiment according to the present invention, although Mo isgiven as one typical example of a metal element having a high meltingpoint which comprises the second metal layer 472, the foregoing effectcan be obtained even if Mo is replaced with, for example, another metalelement having a high melting point. Other typical examples of metalelements having a high melting point which comprise the second metallayer 472 include Pt, W, Ti and Ta, but are not necessarily limited tothese elements. More specifically, the second metal layer 472 whichcomprises Mo can be replaced with any of the Pt layer, the W layer, theTi layer and the Ta layer. The same effect as that in the foregoing canbe obtained even if the afore-mentioned metal element is replaced withintermetallic compounds such as metal silicates and metal nitrides whichhave a high melting point and are thermally stable as the metal materialcomprising the second metal layer 472. For example, the metal materialswhich comprise the second metal layer 472 can be replaced with any ofMo_(x)Si_(1−x) layer (where, 0<x<1), Pt_(x)Si_(1−x) layer (where,0<x<1), W_(x)Si_(1−x) layer (where, 0<x<1), Ti_(x)Si_(1−x) layer (where,0<x<1), Ta_(x)Si_(1−x) layer (where, 0<x<1), Mo_(x)N_(1−x) layer (where,0<x<1), W_(x)N_(1−x) (where, 0<x<1), Ti_(x)N_(1−x) (where, 0<x<1), andTa_(x)N_(1−x) (where, 0<x<1). If the melting points of the metal elementor the intermetallic compounds such as metal silicates and metalnitrides which comprise the second metal layer 472 are 1,000° C. orhigher, the forgoing effect can be obtained. Moreover, it is morepreferable if the melting point is 1,500° C. or higher.

In this embodiment according to the present invention, although Ni isgiven as one typical example of a metal element having a high workfunction which comprises the first metal layer 471, the foregoing effectcan be obtained even if Ni is replaced with, for example, another metalelement having a high work function. Other typical examples of metalelements having a high work function which comprise the first metallayer 471 include Pt and Pd, but are not necessarily limited to theseelements. More specifically, the first metal layer 471 which comprisesNi can be replaced with any of the Pt layer and the Pd layer.

Furthermore, in this embodiment according to the present invention,although Au is given as one typical example of a metal element having alow resistivity which comprises the third metal layer 473, the forgoingeffect can be obtained even if Au is replaced with, for example, anothermetal element having low resistivity. Other typical examples of metalelements having a low resistivity which comprise the third metal layer473 include Cu, Al, and Pt, but are not necessarily limited to theseelements. More specifically, the third metal layer 473 which comprisesAu can be replaced with any of the Cu layer, the Au layer and the Ptlayer. In addition, since the third metal layer 473 is a layer providedto reduce the resistance of the Schottky gate electrode as stated above,limitations to the materials and the like are unnecessary as long as thelayer complies with the purpose.

Fifth Embodiment

Next, a fifth embodiment according to the present invention is describedin reference to FIG. 11.

FIG. 11 is a local longitudinal sectional view showing the mainstructure of a GaN metal-semiconductor field-effect transistor (MESFET)in the fifth embodiment according to the present invention. Thisembodiment according to the present invention has the same structure asthe GaN metal-semiconductor field-effect transistor (MESFET) in thefourth embodiment, except that the gate electrode 47 in the fourthembodiment shown in FIG. 10 is replaced with the gate electrode 27 inthe second embodiment in FIG. 8. Therefore, the detailed description ofthe forgoing effects brought about by the gate electrode structure 27shown in FIG. 2 also applies to the embodiment herein, and thereby,repetitive explanations are omitted. In addition, the description ofother metal materials which can replace those in the gate electrodestructure 27 also applies to the embodiment herein, and thereby,repetitive explanations are omitted.

Sixth Embodiment

Next, a sixth embodiment according to the present invention is describedin reference to FIG. 12.

FIG. 12 is a local longitudinal sectional view showing the mainstructure of a GaN metal-semiconductor field-effect transistor (MESFET)in the sixth embodiment according to the present invention. Thisembodiment according to the present invention has same structure as theGaN metal-semiconductor field-effect transistor (MESFET) in the fourthembodiment, except that the gate electrode 47 in the fourth embodimentshown in FIG. 10 is replaced with the gate electrode 37 in the secondembodiment in FIG. 9. Therefore, the detailed description of theforgoing effects brought about by the gate electrode structure 37 in thethird embodiment shown in FIG. 9 also applies to the embodiment herein,and thereby, repetitive explanations are omitted. In addition, thedescription of other metal materials which can replace those in the gateelectrode structure 37 also applies to the embodiment herein, andthereby, repetitive explanations are omitted.

Seventh Embodiment

Next, a seventh embodiment according to the present invention isdescribed in reference to FIG. 13.

FIG. 13 is a local longitudinal sectional view showing the mainstructure of a GaN/AlGaN heterojunction field-effect transistor (HJFET)in the seventh embodiment according to the present invention. Thetransistor is formed on a GaN substrate 51. In FIG. 13, an undoped AlNbuffer layer 52 is formed on the GaN substrate 51, an undoped GaNchannel layer 53 with a film thickness of 1 μm is formed on the undopedAlN buffer layer 52, a n-type AlGaN electron supplying layer 54comprising a n-type Al_(0.2)Ga_(0.8)N with an impurity concentration of2×1018/cm3 and a film thickness of 30 nm is formed on the undoped GaNchannel layer 53, and an undoped GaN channel layer 55 is formed on then-type AlGaN electron supplying layer 54.

A source electrode 6S and a drain electrode 6D are formed by contactingthe upper surface of the GaN channel layer 55. The source electrode 6 sand the drain electrode 6D are in ohmic contact with the GaN channellayer 55.

Furthermore, a gate electrode 57 is formed in contact with the uppersurface of the GaN channel layer 55. The gate electrode 57 is spacedbetween the source electrode 6S and the drain electrode 6D. The gateelectrode 57 is in Schottky contact with the GaN channel layer 55. Thegate electrode 57 has a two-layer laminated structure. Morespecifically, the two-layer laminated structure comprises a first metallayer comprising a Ni_(0.5)Si_(0.5) layer 571 which is in contact withthe upper surface of the n-type GaN channel layer 55 and a second metallayer comprising an Au layer 572 which is in contact with the uppersurface of the first metal layer 572. The Ni_(0.5)Si_(0.5) layer 571 isin Schottky contact with the GaN channel layer 55.

A two-dimensional electron gas is formed in the area within the GaNchannel layer 55 in the vicinity of the interface with the AlGaNelectron supplying layer 54. The heterojunction field-effect transistor(HJFET) operates as a transistor by modulating the two-dimensionalelectron gas concentration with the potential of the gate electrode 57.In this embodiment according to the present invention, although thechannel layer comprises GaN, it may be replaced with InGaN.

In this embodiment according to the present invention, the structure ofthe gate electrode 57 is the same as the gate electrode structure 27 inthe second embodiment shown in FIG. 8. In other words, in the embodimentherein, the gate electrode structure 27 in the second embodiment shownin FIG. 8 is applied to the GaN/AlGaN heterojunction field-effecttransistor (HJFET). Therefore, the same effect as that described in thefirst embodiment can be obtained.

The important point in this embodiment lies in the fact that theSchottky electrode 57 comprises a two-layer laminated structure whereina first metal layer 571 comprises Ni_(y)Si_(1−y) (where, 0<y<1) as metalmaterials having a high work function and high melting point, and thesecond metal layer 572 comprises Au which is a metal having lowresistivity. Since the bonding force between Ni and Si in Ni_(y)Si_(1−y)(where, 0<y<1), which is example of metal silicates, is strong, it ismore stable at high temperatures than simple substance, Ni. Preferably,it is 0.4≦y≦0.75. If it is 0.4≦y≦0.75 in particular, the melting pointis extremely high, approximately 1,200° C. or higher, and in addition,it is more preferable since the increase in resistivity is smaller incomparison with Ni. For this reason, the thermal diffusion of the metalin the first metal layer 571 to the semiconductor layer, with which theSchottky gate electrode 57 is in contact, is suppressed even at hightemperatures. Furthermore, the interdiffusion between the metal in thesecond metal layer 572 and that in the first metal layer 571 at hightemperatures is suppressed. As a result, the reliability of the deviceis enhanced. More specifically, in order to reduce the resistance of theSchottky gate electrode 57, the second metal layer 572 comprises a metalhaving a low resistivity. On the other hand, in order to form a highSchottky barrier at the interface between the semiconductor layer andthe Schottky gate electrode 57, and to suppress the interdiffusionbetween the metal in the second metal layer 572 and the semiconductorlayer at high temperatures and the thermal diffusion of the metal to thesemiconductor layer, with which the first metal layer 571 is in contact,at high temperatures, the first metal layer 571 comprises a metal havinga high work function and a high melting point, thereby making possibleenhancement of the high temperature characteristics and high powerperformance of the semiconductor layer through enabling the Schottkygate electrode 57 to have not only a high Schottky barrier and lowresistivity, but also high heat resistance.

More specifically, since NiSi, which is the metal material of the firstmetal layer 571, has a higher melting point even in comparison with Au,which is the metal material of the second metal layer 572, theinterdiffusion between NiSi and Au and the thermal diffusion to thesemiconductor layer with which the first metal 571 is in contact issuppressed. In other words, since the first metal layer 571 comprises ametal having a high work function and a high melting point, not only isa high Schottky barrier formed at the interface between thesemiconductor layer and the Schottky gate electrode 57, but in addition,even if the Schottky gate electrode 57 rises to a high temperature, theinterdiffusion between the metal in the first metal layer 571 and thatin the second metal layer 572 is suppressed, thereby suppressing thealloying between the metals. Furthermore, the thermal diffusion of themetal to the semiconductor layer with which the first metal layer 571 isin contact is suppressed. Although the metal layer 571 comprises a metalhaving a high work function, the deterioration of the Schottky barrierat the interface between the GaN channel layer and the first metal layer571 and increase in the reverse directional gate current can besuppressed even at high temperatures, by suppressing the alloying asstated above. For this reason, the gate leak current is suppressed evenat high temperatures, the heat resistance of the Schottky gate electrode57 is improved, and as a result, the reliability of the device isenhanced. Therefore, enhancement of the high temperature characteristicsand high power performance of the semiconductor layer is made possiblethrough enabling the Schottky gate electrode 27 to have not only a highSchottky barrier and low resistance, but also high heat resistance.

In this embodiment according to the present invention, although NiSi wasgiven as one typical example of an intermetallic compound having a highwork function and a high melting point which comprises the first metallayer 571, the foregoing effect can be obtained even if NiSi is replacedwith, for example, another intermetallic compound having a high workfunction and a high melting point. Other typical examples ofintermetallic compounds having a high work function and a high meltingpoint which comprises the first metal layer 571 include other metalsilicates and metal nitrides such as PtSi, PdSi, NiN and PdN, but arenot necessarily limited to these compounds. More specifically, NiSiwhich comprises the first metal layer 571 can be replaced with any ofPt_(y)Si_(1−y) (where, 0.5≦y≦0.75), Pd_(y)Si_(1−y) (where, 0.5≦y≦0.85),Ni_(y)N_(1−y) (where, 0.5≦y≦0.85), and Pd_(y)N_(1−y) (where,0.5≦y≦0.85). The forgoing effect can be obtained if the melting point ofthe intermetallic compound, such as the metal silicate and metalnitride, comprising the first metal layer 571 is 1,000° C. or higher. Inaddition, it is more preferable if the melting point is 1,500° C. orhigher.

Furthermore, in this embodiment according to the present invention,although Au is given as one typical example of the metal element havinga low resistivity comprising the second metal layer 572, the forgoingeffect can be obtained even if Au is replaced with, for example, anothermetal element having a low resistivity. Other typical examples of metalelements having a low resistivity which comprise the second metal layer572 include Cu, Al, and Pt, but are not necessarily limited to theseelements. More specifically, the second metal layer 572 which comprisesAu can be replaced with any of the Cu layer, the Al layer, and the Ptlayer. In addition, since the second metal layer 572 is a layer providedto reduce the resistance of the Schottky gate electrode as stated above,limitations to the materials and the like are unnecessary as long as thelayer complies with the purpose.

Eighth Embodiment

Next, an eighth embodiment according to the present invention isdescribed in reference to FIG. 14.

FIG. 14 is a local longitudinal sectional view showing the mainstructure of a GaN/AlGaN heterojunction field-effect transistor (HJFET)in the eighth embodiment according to the present invention. Thisembodiment according to the present invention has the same structure asthe GaN/AlGaN heterojunction field-effect transistor (HJFET) in theseventh embodiment, except that the gate electrode 57 in the seventhembodiment shown in FIG. 13 is replaced with the gate electrode 17 inthe second embodiment in FIG. 5. Therefore, the detailed description ofthe forgoing effects brought about by the gate electrode structure 17 inthe first embodiment shown in FIG. 5 also applies to the embodimentherein, and thereby, repetitive explanations are omitted. In addition,the description of other metal materials which can replace those in thegate electrode structure 17 also applies to the embodiment herein, andthereby, repetitive explanations are omitted.

Ninth Embodiment

Next, a ninth embodiment according to the present invention is describedin reference to FIG. 15.

FIG. 15 is a local longitudinal sectional view showing the mainstructure of a GaN/AlGaN heterojunction field-effect transistor (HJFET)in the ninth embodiment according to the present invention. Thisembodiment according to the present invention has the same structure theGaN/AlGaN heterojunction field-effect transistor (HJFET) in the seventhembodiment, except that the gate electrode 57 in the seventh embodimentshown in FIG. 13 is replaced with the gate electrode 17 in the secondembodiment in FIG. 5. Therefore, the detailed description of theforgoing effects brought about by the gate electrode structure 37 in thethird embodiment shown in FIG. 9 also applies to the embodiment herein,and thereby, repetitive explanations are omitted. In addition, thedescription of other metal materials which can replace those in the gateelectrode structure 37 applies to the embodiment herein, and thereby,repetitive explanations are omitted.

As stated above, according to the present invention, the Schottkyjunction electrode comprises a three-layer laminated structure wherein afirst metal layer comprises any of Ni, Pt and Pd, a second metal layercomprises any of Mo, Pt, W, Ti, Ta, Mo_(x)Si_(1−x), Pt_(x)Si_(1−x),W_(x)Si_(1−x), Ti_(x)Si_(1−x), Ta_(x)Si_(1−x), Mo_(x)N_(1−x),W_(x)N_(1−x), Ti_(x)N_(1−x), and Ta_(x)N_(1−x) (where, 0<x<1), and athird metal layer comprises any of Au, Cu, Al and Pt. Therefore,interdiffusion between the first metal layer and the third metal layeris suppressed, and the reliability of the device is enhanced. Inaddition, since the first metal layer has a high work function, theSchottky barrier is high, and superior Schottky contact is obtained.Furthermore, if the Schottky junction electrode comprises a two-layerlaminated structure wherein the first metal layer comprises any ofNi_(y)Si_(1−y), Pt_(y)Si_(1−y), Pd_(y)Si_(1−y), Ni_(y)N_(1−y), andPd_(y)N_(1−y) (where, 0<y<1) and the second metal layer comprises any ofAu, Cu, Al and Pt, the thermal diffusion of the first metal layer to theGaN semiconductor is suppressed, and the reliability of the device isenhanced. As a result, the composition contributes immensely to the hightemperature characteristics and high power performance of thesemiconductor device.

Although the present invention is described in relation to some of thepreferred forms and embodiments, it can be understood that these formsand embodiments serve merely as examples provided to describe theinvention, and they are not intended to limit the present invention tothese forms and embodiments. Although it is obvious that a personskilled in the art can easily conduct several modifications andreplacements by an equivalent component or technology after readingthrough this specification of the present invention, it is clear thatthese modifications and replacements fall under the veritable scope andspirit of the claims attached hereto.

Industrial Applicability

As clarified by the foregoing description, although the improvedSchottky junction structure according to the present invention can beapplied to any GaN compound semiconductor device having a Schottkyjunction, it is preferable that the structure is applied, among others,to a high output semiconductor device which will be used in a microwaveband, and in particular, to a semiconductor device which requires highheat resistance and excellent power performance.

1-35. (canceled)
 36. A semiconductor device comprising a semiconductorlayer which comprises a compound semiconductor using Ga_(v)Al_(1−v),(where, 0≦v≦1) as a main component of the Group III-elements and N as amain component of the Group V-elements and a Schottky junction metallayer which is in contact with the semiconductor layer, wherein: saidSchottky junction metal layer comprises a laminated structure wherein afirst metal layer is in contact with said semiconductor layer, a secondmetal layer is in contact with said first metal layer, and a third layeris in contact with said second layer; said second metal layer comprisesa metal material having a higher melting point than those of the metalmaterials in said first metal layer and said third metal layer; saidthird metal layer comprises a metal material having a lower resistivitythan those of the metal materials in said first metal layer and saidsecond metal layer; said first metal layer comprises any metal materialselected from a group comprising Ni, Pt, Pd, Ni_(z)Si_(1−z),Pt_(z)Si_(1−z), Pd_(z)Si_(1−z), Ni_(z)N_(1−z), and Pd_(z)N_(1−z),(where, 0<z<1); and said second metal layer comprises any metal materialselected from a group comprising Mo, W, Ta, Mo_(x)Si_(1−x),Pt_(x)Si_(1−x), W_(x)Si_(1−x), Ti_(x)Si_(1−x), Ta_(x)Si_(1−x),MO_(x)N_(1−x), W_(x)N_(1−x), Ti_(x)N_(1−x), and Ta_(x)N_(1−x), (where,0<x<1).
 37. The semiconductor device according to claim 36, wherein saidthird metal layer comprises any metal material selected from a groupcomprising Au, Cu, Al, and Pt.
 38. The semiconductor device according toclaim 36, wherein said first metal material comprises a metal materialhaving a higher work function than that of the metal material in saidsecond metal material.
 39. The semiconductor device according to claim38, wherein said metal layer comprises a metal material having a higherwork function than that of the metal material in said third metal layer.40. The semiconductor device according to claim 36, wherein the meltingpoint of said second metal layer is 1,000° C. or higher.
 41. Thesemiconductor device according to claim 36, wherein said semiconductorlayer is formed on a multilayered structure comprising a plurality ofcompound semiconductor layers formed on a substrate.
 42. Thesemiconductor device according to claim 41, wherein said substratecomprises any substrate selected from a group comprising a sapphiresubstrate, a SiC substrate, and a GaN substrate.
 43. The semiconductordevice according to claim 36, wherein said semiconductor layer is anAl_(u),Ga_(1−u)N layer (where, 0≦u≦1).
 44. The semiconductor deviceaccording to claim 36, wherein said semiconductor layer is a GaNcompound semiconductor electron supplying layer formed on a GaN compoundsemiconductor channel layer.
 45. The semiconductor device according toclaim 44, wherein said GaN compound semiconductor channel layercomprises a compound semiconductor selected from a group comprising GaNand InGaN, and a GaN compound semiconductor electron supplying layercomprises AlGaN.
 46. The semiconductor device according to claim 36,wherein said semiconductor layer is a GaN compound semiconductor channellayer formed on a GaN compound semiconductor electron supplying layer.47. The semiconductor device according to claim 46, wherein said GaNcompound semiconductor channel layer comprises a compound semiconductorselected from a group comprising GaN and InGaN, and said GaN compoundsemiconductor electron supplying layer comprises AlGaN.
 48. Thesemiconductor device according to claim 36, wherein said semiconductorlayer is a n-type GaN channel layer.
 49. A semiconductor devicecomprising a semiconductor layer which comprises a compoundsemiconductor using Ga_(v)Al_(1−v) (where, 0≦v≦1) as a main component ofthe Group III-elements and N as a main component of the Group V-elementsand a Schottky junction metal layer which is in contact with thesemiconductor layer, wherein: said Schottky junction metal layercomprises a laminated structure wherein a first metal layer is incontact with said semiconductor layer, a second metal layer is incontact with said first metal layer, and a third layer is in contactwith said second layer; said second metal layer comprises a metalmaterial having a higher melting point than those of the metal materialsin said first metal layer and said third metal layer; said third metallayer comprises a metal material having a lower resistivity than thoseof the metal materials in said first metal layer and said second metallayer; said first metal layer comprises any metal material selected froma group comprising Ni_(z1)Si_(1−z1) (where, 0.4≦z1≦0.75),Pt_(z2)Si_(1−z2) (where, 0.5≦z2≦0.75), Pd_(z3)Si_(1−z3) (where,0.5≦z3≦0.85), Ni_(z4)N_(1−z4) (where, 0.5≦z4≦0.85), and Pd_(z5)N_(1−z5)(where, 0.5≦z5≦0.85); and said second metal layer comprises any metalmaterial selected from a group comprising Mo, W, Ta, Mo_(x)Si_(1−x),Pt_(x)Si_(1−x), W_(x)Si_(1−x), Ti_(x)Si_(1−x), Ta_(x)Si_(1−x),Mo_(x)N_(1−x)) W_(x)N_(1−x), Ti_(x)N_(1−x), and Ta_(x)N_(1−x), (where,0<x<1).
 50. The semiconductor device according to claim 49, wherein saidthird metal layer comprises any metal material selected from a groupcomprising Au, Cu, Al, and Pt.
 51. The semiconductor device according toclaim 49, wherein said first metal layer comprises a metal materialhaving a higher work function than that of the metal material in saidsecond metal layer.
 52. The semiconductor device according to claim 51,wherein said first metal layer comprises a metal material having ahigher work function than that of the metal material in said third metallayer.
 53. The semiconductor device according to claim 49, wherein themelting point of said second metal layer is 1,000° C. or higher.
 54. Thesemiconductor device according to claim 49, wherein said semiconductorlayer is formed on a multilayered structure comprising a plurality ofcompound semiconductor layers formed on a substrate.
 55. Thesemiconductor device according to claim 54, wherein said substratecomprises any substrate selected from a group comprising a sapphiresubstrate, a SiC substrate and a GaN substrate.
 56. The semiconductordevice according to claim 49, wherein said semiconductor layer is anAl_(u)Ga_(1−u)N layer (where, 0≦u≦1).
 57. The semiconductor deviceaccording to claim 49, wherein said semiconductor layer is a GaNcompound semiconductor electron supplying layer formed on a GaN compoundsemiconductor channel layer.
 58. The semiconductor device according toclaim 57, wherein said GaN compound semiconductor channel layercomprises a compound semiconductor selected from a group comprising GaNand InGaN, and GaN compound semiconductor electron supplying layercomprises AlGaN.
 59. The semiconductor device according to claim 49,wherein said semiconductor layer is a GaN compound semiconductor channellayer formed on a GaN compound semiconductor electron supplying layer.60. The semiconductor device according to claim 59, wherein said GaNcompound semiconductor channel layer comprises a compound semiconductorselected from a group comprising GaN and InGaN, and said GaN compoundsemiconductor electron supplying layer comprises AlGaN.
 61. Thesemiconductor device according to claim 49, wherein said semiconductorlayer is a n-type GaN channel layer.
 62. A semiconductor devicecomprising a semiconductor layer comprising a compound semiconductorusing Ga_(v)Al_(1−v) (where, 0≦v≦1) as a main component III-elements andN as a main component of the Group V-elements and a Schottky junctionmetal layer which is in contact with the semiconductor layer, wherein:said Schottky junction metal layer comprises a laminated structurewherein a first metal layer is in contact with said semiconductor layerand a second metal layer is in contact with said first metal layer; saidfirst metal layer comprises a metal material having a higher meltingpoint than that of the metal material in said second metal layer; saidsecond metal layer comprises a metal material having a lower resistivitythan that of the metal material in said first metal layer: and saidfirst metal layer comprises any metal material selected from a groupcomprising Ni_(y)N_(1−y) and Pd_(y)N_(1−y) (where, 0<y<1).
 63. Thesemiconductor device according to claim 62, wherein said second metallayer comprises any metal material selected from a group comprising anymetal material selected from a group comprising Au, Cu, Al, and Pt. 64.The semiconductor device according to claim 62, wherein said first metallayer has a higher work function than said second metal layer.
 65. Thesemiconductor device according to claim 62, wherein the melting point ofsaid first metal layer is 1,000° C. or higher.
 66. The semiconductordevice according to claim 62, wherein said semiconductor layer is formedon a multilayered structure comprising a plurality of compoundsemiconductor layers formed on a substrate.
 67. The semiconductor deviceaccording to claim 66, wherein said substrate comprises any substrateselected from a group a sapphire substrate, a SiC substrate, and a GaNsubstrate.
 68. The semiconductor device according to claim 62, whereinsaid semiconductor layer is an Al_(u)Ga_(1−u)N layer (where, 0≦u≦1). 69.The semiconductor device according to claim 62, wherein saidsemiconductor layer is a GaN compound semiconductor electron supplyinglayer formed on a GaN compound semiconductor channel layer.
 70. Thesemiconductor device according to claim 69, wherein said GaN compoundsemiconductor channel layer comprises a compound semiconductor selectedfrom a group comprising GaN and InGaN, and GaN compound semiconductorelectron supplying layer comprises AlGaN.
 71. The semiconductor deviceaccording to claim 62, wherein said semiconductor layer is a GaNcompound semiconductor channel layer formed on a GaN compoundsemiconductor electron supplying layer.
 72. The semiconductor deviceaccording to claim 71, wherein said GaN compound semiconductor channellayer comprises a compound semiconductor selected from a groupcomprising GaN and InGaN, and said GaN compound semiconductor electronsupplying layer comprises AlGaN.
 73. The semiconductor device accordingto claim 62, wherein said semiconductor layer is a n-type GaN channellayer.
 74. A semiconductor device comprising a semiconductor layer whichcomprises a compound semiconductor using Ga_(v)Al_(1−v) (where, 0≦v≦1)as a main component of the Group III-elements and N as a main componentof the Group V-elements and a Schottky junction metal layer which is incontact with the semiconductor layer, wherein: said Schottky junctionmetal layer comprises a laminated structure wherein a first metal layeris in contact with said semiconductor layer and a second metal layer isin contact with said first metal layer; said first metal layer comprisesa metal material having a higher melting point than that of the metalmaterial in said second metal layer; said second metal layer comprises ametal material having a lower resistivity than that of the metalmaterial of said first metal layer: and said first metal layer comprisesany metal material selected from a group comprising Ni_(y4)N_(1−y4) andPd_(y5)N_(1−y5) (where, 0.5≦y5≦0.85).
 75. The semiconductor deviceaccording to claim 74, wherein said second metal layer comprises anymetal material selected from a group comprising Au, Cu, Al, and Pt. 76.The semiconductor device according to claim 74, wherein said first metallayer has a higher work function than said second metal layer.
 77. Thesemiconductor device according to claim 74, wherein the melting point ofsaid first metal layer is 1,000° C. or higher.
 78. The semiconductordevice according to claim 74, wherein said semiconductor layer is formedon a multilayered structure comprising a plurality of compoundsemiconductor layers formed on a substrate.
 79. The semiconductor deviceaccording to claim 78, wherein said substrate comprises any substrateselected from a group comprising a sapphire substrate, a SiC substrate,and a GaN substrate.
 80. The semiconductor device according to claim 74,wherein said semiconductor layer is an Al_(u)Ga_(1−u)N layer (where,0≦u≦1).
 81. The semiconductor device according to claim 74, wherein saidsemiconductor layer is a GaN compound semiconductor electron supplyinglayer formed on a GaN compound semiconductor channel layer.
 82. Thesemiconductor device according to claim 81, wherein said GaN compoundsemiconductor channel layer comprises a compound semiconductor selectedfrom a group comprising GaN and InGaN, and said GaN compoundsemiconductor electron supplying layer comprises AlGaN.
 83. Thesemiconductor device according to claim 74, wherein said semiconductorlayer is a GaN compound semiconductor channel layer formed on a GaNcompound semiconductor electron supplying layer.
 84. The semiconductordevice according to claim 83, wherein said GaN semiconductor channellayer comprises a compound semiconductor selected from GaN and InGaN,and said GaN compound semiconductor electron supplying layer comprisesAlGaN.
 85. The semiconductor device according to claim 74, wherein saidsemiconductor layer is a n-type GaN channel layer. 86-89. (canceled)